I am an engineer turned computer scientist. My research interests include
- Formal Verification,
- Logic and Automata,
- and Artificial Intelligence.
Verification of Hardware and Software Systems. Hardware and software systems are hard to design and implement correctly. I study formal logics that can be used to precisely specify what such systems are intended to do, and formal models like automata and games to abstract their behaviour. With my co-authors, we use these mathematical tools to develop algorithms that enable the verification of systems against their specifications.
Verification Tools. I am part of the organizational team for the Reactive Synthesis Competition SYNTCOMP for which I have developed a tool called AbsSynthe.