My research interests include
- Formal Verification,
- Logic and Automata, and
- Artificial Intelligence.
See my DBLP entry for a list of my publications.
What is Verification?
Hardware and software systems are hard to design and implement correctly. I study formal logics that can be used to precisely specify what such systems are intended to do, and formal models like automata and games to abstract their behaviour. With my co-authors, we use these mathematical tools to develop algorithms that enable the verification of systems against their specifications.
I am the head of the Formal Techniques in Software Engineering (FOTS) lab, a part of the AnSyMo research group.
- Raphaël Berthon (jointly supervised with J.-F. Raskin)
- Ritam Raha (jointly supervised with N. Fijalkow, F. Geerts)
- Tim Leys
- Dennis Groß (jointly supervised with N. Jansen)
I am part of the organizational team for the Reactive Synthesis Competition SYNTCOMP for which I have developed a tool called AbsSynthe. See my GitHub page for a complete list of my tool projects.